CVE-2024-24853

high

Description

Incorrect behavior order in transition between executive monitor and SMI transfer monitor (STM) in some Intel(R) Processor may allow a privileged user to potentially enable escalation of privilege via local access.

References

https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01083.html

Details

Source: Mitre, NVD

Published: 2024-08-14

Updated: 2024-08-14

Risk Information

CVSS v2

Base Score: 5.9

Vector: CVSS2#AV:L/AC:H/Au:M/C:C/I:C/A:C

Severity: Medium

CVSS v3

Base Score: 7.2

Vector: CVSS:3.0/AV:L/AC:H/PR:H/UI:R/S:C/C:H/I:H/A:H

Severity: High

CVSS v4

Base Score: 7.3

Vector: CVSS:4.0/AV:L/AC:H/AT:P/PR:H/UI:P/VC:H/VI:H/VA:H/SC:H/SI:H/SA:H