CVE-2024-44949

high

Description

In the Linux kernel, the following vulnerability has been resolved: parisc: fix a possible DMA corruption ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be possible that two unrelated 16-byte allocations share a cache line. If one of these allocations is written using DMA and the other is written using cached write, the value that was written with DMA may be corrupted. This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 - that's the largest possible cache line size. As different parisc microarchitectures have different cache line size, we define arch_slab_minalign(), cache_line_size() and dma_get_cache_alignment() so that the kernel may tune slab cache parameters dynamically, based on the detected cache line size.

References

https://git.kernel.org/stable/c/dadac97f066a67334268132c1e2d0fd599fbcbec

https://git.kernel.org/stable/c/7ae04ba36b381bffe2471eff3a93edced843240f

https://git.kernel.org/stable/c/642a0b7453daff0295310774016fcb56d1f5bc7f

https://git.kernel.org/stable/c/533de2f470baac40d3bf622fe631f15231a03c9f

https://git.kernel.org/stable/c/3dfd8991ad33b10c2fb027a4cfcf57579fa786c1

https://git.kernel.org/stable/c/00baca74fb5879e5f9034b6156671301f500f8ee

Details

Source: Mitre, NVD

Published: 2024-09-04

Updated: 2024-12-19

Risk Information

CVSS v2

Base Score: 6.8

Vector: CVSS2#AV:L/AC:L/Au:S/C:C/I:C/A:C

Severity: Medium

CVSS v3

Base Score: 7.8

Vector: CVSS:3.0/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H

Severity: High